AT89C51ID2-RLTIM【PDF 22/157 页】IC 8051 MCU FLASH 64K 44VQFP

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118

AT89C51ID2

4289C–8051–11/05

Table 89. Program Lock Bits

Note:

U: unprogrammed or "one" level.

P: programmed or "zero" level.

X: do not care

WARNING: Security level 2 and 3 should only be programmed after Flash and code

verification.

These security bits protect the code access through the parallel programming interface.

They are set by default to level 4. The code access through the ISP is still possible and

is controlled by the "software security bits" which are stored in the extra Flash memory

accessed by the ISP firmware.

To load a new application with the parallel programmer, a chip erase must first be done.

This will set the HSB in its inactive state and will erase the Flash memory. The part ref-

erence can always be read using Flash parallel programming modes.

Default Values

The default value of the HSB provides parts ready to be programmed with ISP:

BLJB: Programmed force ISP operation.

X2: Unprogrammed to force X1 mode (Standard Mode).

XRAM: Unprogrammed to valid XRAM

LB2-0: Security level four to protect the code from a parallel access with maximum

security.

Software Registers

Several registers are used, in factory and by parallel programmers. These values are

used by Atmel ISP.

These registers are in the "Extra Flash Memory" part of the Flash memory. This block is

also called "XAF" or eXtra Array Flash. They are accessed in the following ways:

Commands issued by the parallel memory programmer.

Commands issued by the ISP software.

Calls of API issued by the application software.

Several software registers described in Table 90.

Program Lock Bits

Protection description

Security

level

LB0

LB1

LB2

No program lock features enabled.

MOVC instruction executed from external program memory is disabled

from fetching code bytes from internal memory, EA is sampled and

latched on reset, and further parallel programming of the on chip code

memory is disabled.

ISP and software programming with API are still allowed.

Writing EEprom Data from external parallel programmer is disabled but

still allowed from internal code execution.

Same as 2, also verify code memory through parallel programming

interface is disabled.

Writing And Reading EEPROM Data from external parallel programmer

is disabled but still allowed from internal code execution..

Same as 3, also external execution is disabled. (Default)

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AT89C51ID2-RLTUM 功能描述:8位微控制器 -MCU C51ID2 64K FLASH 32KHz 3-5.5V RoHS:否制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT

AT89C51ID2-SLRIM 功能描述:IC MCU FLASH 8051 64K 5V 44-PLCC RoHS:否类别:集成电路 (IC) >> 嵌入式 - 微控制器，系列:89C 标准包装:1,500 系列:AVR® ATtiny 核心处理器:AVR 芯体尺寸:8-位速度:16MHz 连通性:I²C，LIN，SPI，UART/USART，USI 外围设备:欠压检测/复位，POR，PWM，温度传感器，WDT 输入/输出数:16 程序存储器容量:8KB（4K x 16）程序存储器类型:闪存 EEPROM 大小:512 x 8 RAM 容量:512 x 8 电压 - 电源 (Vcc/Vdd):2.7 V ~ 5.5 V 数据转换器:A/D 11x10b 振荡器型:内部工作温度:-40°C ~ 125°C 封装/外壳:20-SOIC（0.295"，7.50mm 宽）包装:带卷 (TR)

AT89C51ID2-SLRUM 功能描述:8位微控制器 -MCU C51ID2 64K FLASH TWI 32KHz 5V RoHS:否制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT

AT89C51ID2-SLSIM 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:8-bit Flash Microcontroller

AT89C51ID2-SLSUM 功能描述:8位微控制器 -MCU 64K FLASH 32KHz 3.5-5V Ind. RoHS:否制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT

AT89C51ID2-SMSIM 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:8-bit Flash Microcontroller

AT89C51ID2-UM 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:8-bit Flash Microcontroller

AT89C51RB2 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:8-bit Microcontroller with 16K/ 32K Bytes Flash

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